global DESIGN_NAME

if {[info exist mod]} {
    unset mod
    }

#---------set module hierarchy------------
set mod(0) u_core
set mod(1) u_reg
set mod(2) u_core/u_proc_demo

#---------------statistic-----------------
set SeqCell [get_flat_cells -filter "is_sequential==true &&  is_clock_gate==false"]
set SizeSeq [sizeof_collection $SeqCell]
set IcgNum 0
set RstNum 0
for {set i 0} {$i < [array size mod]} {incr i} {
    set ModSeqNum($i) 0
    set ModIcgNum($i) 0
    set ModRstNum($i) 0
}

foreach_in_collection seq $SeqCell {
    #echo [get_object_name $seq] >> seq.log
    set pin [get_flat_pins -of_objects $seq -filter "pin_on_clock_network_per_scn==true"]
    #set pin [get_flat_pins -of_objects $seq -filter "pin_on_clock_network==true"]
    set driver [get_flat_cells -of_objects [get_flat_pins -of_objects [get_flat_nets -of_objects $pin] -filter "pin_direction==out"]]
    set driverName [get_object_name $driver]
    set seqName [get_object_name $seq]
    set pinName [get_attribute [get_flat_pins -of_objects $seq] name]
    for {set i 0} {$i < [array size mod]} {incr i} {
        if {[regexp $mod($i) $seqName ]} {
            set ModSeqNum($i) [incr ModSeqNum($i)]
            if {[regexp "clk_gate.*latch" $driverName ]} {
                set ModIcgNum($i) [incr ModIcgNum($i)]
            }
            if {[regexp "RDN|SDN|CDN" $pinName ]} { 
                #RDN:pin of async active-low reset; SDN:pin of async active-low set
                #you can get reset port name in xxx_top.mapped.v
                set ModRstNum($i) [incr ModRstNum($i)]
            }
        }
    }
    if {[regexp "clk_gate.*latch" $driverName]} {
        set IcgNum [incr IcgNum]
    }
    if {[regexp "RDN|SDN|CDN" $pinName ]} {
        set RstNum [incr RstNum]
    }
}

#------------------print--------------------
echo "=====================================================================================================" >> ./work/dc/reports/$DESIGN_NAME.icg_rst.rpt
echo "[format "%-30s" "Module"]|\tSeqNum\t|\tICG Ratio\t|\tReset Ratio " > ./work/dc/reports/$DESIGN_NAME.icg_rst.rpt    
for {set i 0} {$i < [array size mod]} {incr i} {
    set IcgRatio [expr $ModIcgNum($i) / ($ModSeqNum($i) + 0.0)]
    set RstRatio [expr $ModRstNum($i) / ($ModSeqNum($i) + 0.0)]
    echo "[format "%-30s" $mod($i)]|\t[format "%d" $ModSeqNum($i)]\t|\t[format "%.4f" $IcgRatio]\t|\t[format "%.4f" $RstRatio]" >> ./work/dc/reports/$DESIGN_NAME.icg_rst.rpt 
}
set IcgRatio [expr $IcgNum / ($SizeSeq + 0.0)]
set RstRatio [expr $RstNum / ($SizeSeq + 0.0)]
echo "[format "%-30s" "__TOP__"]|\t[format "%d" $SizeSeq]\t|\t[format "%.4f" $IcgRatio]\t|\t[format "%.4f" $RstRatio]" >> ./work/dc/reports/$DESIGN_NAME.icg_rst.rpt 









